The present invention generally relates to antilock brake control devices and more particularly, to an antilock brake Control device including a microprocessor which detects locking symptom of wheels on the basis of signals inputted from wheel speed sensors so as to output control signals to actuators and a monitor which prohibits antilock control when the monitor has detected that the microprocessor is not functioning properly.
Generally, in a known antilock-brake control device for a motor vehicle, arithmetic operation of signals outputted by wheel speed sensors is performed by a microprocessor such that locking symptom of wheels is monitored from such behaviors of the wheels and a vehicle as wheel speeds, wheel accelerations or decelerations, an estimated vehicle speed, etc. Meanwhile, when locking symptom of the wheels has been detected, the microprocessor outputs to actuators signals for commanding reduction of brake fluid pressure. Then, in case the wheel speeds trend towards recovery, the microprocessor outputs to the actuators signals for commanding increase of brake fluid pressure. By adjusting brake fluid pressure as described above, skid of the wheels is restricted to a region in the vicinity of peak of coefficient of friction of a road surface on which the motor vehicle is running, so that not only braking distance is shortened but stability of the vehicle body and driving performance are improved.
Regardless of whether or not a driver brakes the wheels, the known antilock brake control device is operated to reduce brake fluid pressure. Therefore, if false control signals are outputted to the actuators by the microprocessor due to malfunction of the microprocessor, such serious problem arise that behaviors of the vehicle body become unstable, etc. In order to solve this problem, an antilock brake control device has been hitherto provided in which in case malfunction of the microprocessor has been detected by monitoring the microprocessor, antilock control is prohibited.
Firstly, such an antilock brake control device including two independent microprocessors receiving signals from wheel speed sensors, respectively is disclosed in, for example, Japanese Patent Laid-Open Publication No. 59-130768 (1984). In this prior art antilock brake control device, control signals of one microprocessor are not only outputted to actuators but compared with control signals outputted from the other microprocessor. In case the control signals of one microprocessor do not coincide with those of the other microprocessor, antilock control is prohibited by judging that the microprocessor are not functioning properly. In the prior art antilock brake control device of this kind, since the two microprocessors perform same arithmetic operations, an identical microprocessor is used for the two microprocessors.
Secondly, Japanese Patent Publication No. 3-7538 (1991) or Japanese Patent Laid-Open Publication No. 63-233401 (1988) discloses an antilock brake control device including two independent microprocessors for controlling actuators of different brake fluid pressure circuits, respectively such that each of the microprocessors monitors control outputs of the remaining one of the microprocessors. Also in this known antilock brake control device, since the two microprocessors perform same arithmetic operations, an identical microprocessor is used for the microprocessors.
Thirdly, Japanese Patent Laid-Open Publication No. 2-296570 (1990) discloses an antilock brake control device including a main microprocessor which performs arithmetic operation of signals of wheel speed sensors so as to output control signals and a fail-safe microprocessor for monitoring the main microprocessor. The fail-safe microprocessor includes a timer for measuring period during which the control signals command pressure reduction. If the period measured by the timer exceeds a predetermined period (ON limit period), the fail-safe microprocessor prohibits operation of the main microprocessor by judging that the main microprocessor is not functioning properly. Meanwhile, in this conventional antilock brake control device, when pressure reduction is necessary for the ON limit period or more as in the case of high-speed running, the timer is adapted to be reset by momentarily changing control signals to pressure increase at a preset interval shorter than the ON limit period. Since the preset interval for changing the control signals to pressure increase is extremely short, actuators are not operated, thereby resulting in exertion of no influence on control of brake fluid pressure.
Fourthly, Japanese Patent-Laid Open Publication No. 64-47656 (1989) filed by the assignee assigned by the present assignee discloses an antilock brake control device in which a microprocessor detects its own malfunction.
However, the prior art antilock brake control devices referred to above have the following drawbacks. Initially, in the first and second prior art antilock brake control devices, since the two microprocessors of the same kind are used, malfunction of the microprocessor may not be detected in the case of systematic error exerting an identical influence on the two microprocessors, e.g., interference of radio frequency, variations in a power source, etc. Meanwhile, the two microprocessor capable of performing arithmetic operation of the signals of the wheel speed sensors are required to be provided in the antilock brake control devices of this kind, thus resulting in rise of production cost of the antilock brake control devices.
Meanwhile, in the third prior art antilock brake control device, since the fail-safe microprocessor which merely monitors the main microprocessor may be of relatively simpler structure than that of the main microprocessor, systematic error can be dealt with and production cost of the antilock brake control device can lowered.
However, in the third prior art antilock brake control device, since the fail-safe microprocessor detects malfunction of the main microprocessor when period during which the main microprocessor outputs pressure reduction exceeds the ON limit period, a problem arises when detection of malfunction (initial check) of the antilock brake control device is performed upon turning on of a power source of a motor vehicle at the time of start of the motor vehicle. Namely, the fail-safe microprocessor detects that the main microprocessor has outputted the control signals of pressure reduction for not less than the ON limit period. Thus, in order to confirm that the fail-safe microprocessor functions properly at the time of initial check, it is necessary to cause the main microprocessor to output the control signals of pressure reduction for a predetermined duration not less than at least the ON limit period. Therefore, during this predetermined duration, braking force cannot be obtained even if the driver steps on a brake pedal. As a result, assuming that the motor vehicle is parked on a slope at the time of initial check, the motor vehicle may run downwardly due to lack of braking force. Likewise, also during running of the motor vehicle, it is impossible to confirm that the fail-safe microprocessor is functioning properly.
Furthermore, in the case where the microprocessor detects its own malfunction as in the fourth prior art antilock brake control device, there is a high possibility that malfunction of the microprocessor cannot be detected in comparison with the first to third prior art antilock brake control devices employing the two microprocessors.